1. Field of the Invention
The present invention relates to a system of floating-point addition/subtraction for two sets of data. The system according to the present invention is used in computers for general-purpose work.
2. Description of the Related Art
In general, the realization of the digit position alignment of the fractions, the addition of the fractions, and the normalization are carried out in the addition/subtraction between two sets of data each of which consists of the sign portion, the characteristic (exponent) portion, and the fraction (mantissa) portion.
In the prior art, first, the comparison calculation of the characteristic of two sets of input data is carried out in a comparator to generate shift control data representing the difference between the characteristics and information telling which set of input data is greater than the other set of input data. The generated shift control data is then supplied to shifting circuits in which the shifting operation of the fractions is carried out for realizing the digit position alignment between the fractions of the two sets of input data.
In such a prior art process, the comparison calculation of the characteristics and the shifting operation of the fractions are carried out only in sequence. Thus, there has been a problem in such a prior art process in that it takes a considerable length of time to carry out the processing of the floating-point addition/subtraction for two sets of data.